Jan Gray

1. Towards an Area-Efficient Implementation of a High ILP EDGE Soft\n Processor
   2018/03/18 by Jan Gray, Gray, Jan, Aaron Smith +2 · 3 voices
   Computer Science · #Embedded Systems Design Techniques #Interconnection Networks and Systems #Parallel Computing and Optimization Techniques #cs.AR
2. GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator
   2016/06/03 by Jan Gray, Gray, Jan · 3 citations
   Computer Science · #Embedded Systems Design Techniques #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Interconnection Networks and Systems #Parallel Computing and Optimization Techniques