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Dual top gated graphene transistor in the quantum Hall regime

2011/08/16 by Ajay K. Bhat, Vibhor Singh, Sunil Patil +1
Engineering · Materials Science · Physics and Astronomy · #Graphene research and applications #Low-power high-performance VLSI design #Quantum and electron transport phenomena #cond-mat.mes-hall

paper · pdf · doi:10.1016/j.ssc.2011.12.030

published as Solid State Communications, Volume 152, 545-548 (2012) · 4 pages, supporting information at http"//www.tifr.res.in/~nano

arxiv created 2011/08/16 · openalex publication_date 2011/12/22 · arxiv updated 2012/03/09 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

We study the effect of local modulation of charge density and carrier type in graphene field effect transistors using a double top gate geometry. The two top gates lead to the formation of multiple p-n junctions. Electron transport measurements at low temperature and in the presence of magnetic field show various integer and fractionally quantized conductance plateaus. We explain these results based on the mixing of the edge channels and find that inhomogeneity plays an important role in defining the exact quantization of these plateaus, an issue critical for the metrology applications of p-n junctions.

Citations