2023/10/03 by Giuseppe Capasso, Mauro Zanuccoli, Andrea Natale Tallarico +2 · 3 citations
Engineering · Mathematics · Physics and Astronomy · #Computer science #Degradation (telecommunications) #Duty cycle #Electrical engineering #Electronic engineering #Engineering #GaN-based semiconductor devices and materials #Materials science #Mathematics #Physics #Power (physics) #Quantum mechanics #Reliability (semiconductor) #Semiconductor materials and devices #Silicon Carbide Semiconductor Technologies #Stress (linguistics) #Term (time) #Topology (electrical circuits) #Transistor #Voltage
paper · pdf · doi:10.1109/ted.2023.3318865
published in IEEE Transactions on Electron Devices 70(11), 5807-5813 (Institute of Electrical and Electronics Engineers)
openalex publication_date 2023/10/03 · openalex created_date 2023/10/04 · openalex updated_date 2026/07/29
This article presents an in-circuit approach to assess the long-term reliability of enhancement-mode GaN HEMTs. A synchronous buck converter conceived for the on-board transistors’ characterization is proposed. Here, high-side and low-side power transistors operate under realistic stress conditions, whereas their degradation is assessed by measuring, in-circuit, the fullI–Vcharacteristics at prefixed stress times. Moreover, a long-term reliability analysis of commercial 80-V GaN HEMTs is reported. Threshold voltage and ON-state resistance degradation induced by the buck converter operation is investigated, as well as their dependencies on the input voltage, duty cycle, ambient temperature, and output current. Results highlight a clear difference compared to standard dc-stress and reveal a strong correlation between the degradation of the high-side transistor and the input voltage. On the contrary, the low-side transistor degradation is almost insensitive to the different operating regimes of the power converter.