2011/06/29 by Paolo Magnone, Felice Crupi, Nicole Wils +6 · 1 citation
Engineering · #Semiconductor materials and devices #Advancements in Semiconductor Devices and Circuit Design #Electrostatic Discharge in Electronics
paper · doi:10.1109/ted.2011.2156414
This paper examines the impact of hot carriers (HCs) on n-channel metal-oxide-semiconductor (MOS) field-effect transistor mismatch across the 45- and 65-nm complementary MOS technology generations. The reported statistical analysis is based on a large overall sample population of about 1000 transistors. HC stress introduces a source of variability in device electrical parameters due to the randomly generated charge traps in the gate dielectric or at the substrate/dielectric interface. The evolution of the threshold-voltage mismatch during an HC stress is well modeled by assuming a Poisson distribution of the induced charge traps with a nonuniform generation along the channel. Once the evolution of the HC-induced <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VT</i> shift is known, a single parameter is able to accurately describe the evolution of the HC-induced <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">VT</i> variability. This parameter is independent of the stress time and stress bias voltage. The HC stress causes a significantly larger degradation in the subthreshold slope variability, compared to threshold voltage variability for both investigated technology nodes.