Trap-Profile Extraction Using High-Voltage Capacitance–Voltage Measurement in AlGaN/GaN Heterostructure Field-Effect Transistors With Field Plates

2015/02/05 by Wen-Chia Liao, Jen-Inn Chyi, Jen‐Inn Chyi +2
Physics and Astronomy · Engineering · #GaN-based semiconductor devices and materials #Semiconductor materials and devices #Silicon Carbide Semiconductor Technologies

paper · doi:10.1109/ted.2015.2395720

Abstract

A measurement methodology involving high-voltage capacitance-voltage (C-V) was proposed to determine the trapping profile of a stressed AlGaN/GaN heterostructure field-effect transistor (HFET). Comparing the curves between initial (device without stress) and stressed (device with stress) C-V measurements revealed that the transient behavior was dominated by ionized acceptor-like traps, and the trapping profile within the high drain-to-source OFF-state stressed AlGaN/GaN HFET could be deduced.

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