2021/07/27 by Binh Le, Binh Q. Le, Akash Levy +11 · 42 citations
Engineering · Mathematics · #Advanced Memory and Neural Computing #Algorithm #Computer hardware #Computer science #Electrical engineering #Electronic engineering #Energy (signal processing) #Engineering #Ferroelectric and Negative Capacitance Devices #Mathematics #Radar #Resistive random-access memory #Semiconductor materials and devices #Telecommunications #Voltage
paper · doi:10.1109/ted.2021.3097975
published in IEEE Transactions on Electron Devices 68(9), 4397-4403 (Institute of Electrical and Electronics Engineers)
openalex publication_date 2021/07/27 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/29
HfO2-based resistive RAM (RRAM) is an emerging nonvolatile memory technology that has recently been shown capable of storing multiple bits-per-cell. The energy/delay costs of an RRAM write operation are dependent on the number of pulses required for RRAM programming. The pulse count is often large when existing programming approaches are used for multiple bits-per-cell RRAM, especially when resistance ranges are allocated to account for retention. We present a new technique, Range-Dependent Adaptive Resistance (RADAR) Tuning, for fast and energy-efficient programming of multiple bits-per-cell RRAM arrays, using a combination of coarse- and fine-grained RRAM resistance tuning. Experimental data are collected on 16k cells from two 1Megacell (1M physical cells) 1T1R HfO2-based RRAM arrays fabricated in a 130-nm CMOS process. RADAR reduces the programming pulse count by 2.4X (for both uncycled cells and cells that have undergone 8k cycles) on average over existing programming techniques tested on the same RRAM arrays, with the same bit error rate targets.