2019/01/03 by Reza Mirosanlou, Mirosanlou, Reza, Mohammadkazem Taram +6
Computer Science · Engineering · #3D IC and TSV technologies #Advanced Memory and Neural Computing #Emerging Technologies (cs.ET) #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Interconnection Networks and Systems #cs.AR #cs.ET
paper · pdf · doi:10.48550/arxiv.1901.00568
Initially Accepted to ICCD 2015
arxiv created 2019/01/03 · openalex publication_date 2019/01/03 · arxiv updated 2019/01/04 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Three Dimensional Integrated Circuits (3D IC) offer lower power consumption, higher performance, higher bandwidth, and scalability over the conventional two dimensional ICs. Through-Silicon Via (TSV) is one of the fabrication mechanisms that connects stacked dies to each other. The large size of TSVs and the proximity between them lead to undesirable coupling capacitance. This interference causes mutual influences between adjacent TSVs and produces crosstalk noise. Furthermore, this effect threats the reliability of data during traversal between layers. This paper proposes a mechanism that efficiently reduces crosstalk noise between TSVs with lower area overhead as compared to previous works. This mechanism revolves around the fact that retaining TSV value in current state can reduce coupling in some cases. To evaluate the mechanism, gem5 simulator is used for data extraction and several benchmarks are taken from the SPEC2006 suite. The simulation results show that the proposed mechanism reduces crosstalk noise with only 30% imposed TSV overhead while delay decreased up to 25.7% as compared to a recent related work.