A Practical Approach for Circuit Routing on Dynamic Reconfigurable\n Devices

2005/03/24 by Ali Ahmadinia, Ahmadinia, Ali, Christophe Bobda +12
Computer Science · Engineering · #B.7 #C.3 #C.5 #Embedded Systems Design Techniques #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Interconnection Networks and Systems #VLSI and Analog Circuit Testing #VLSI and FPGA Design Techniques

paper · pdf · doi:10.48550/arxiv.cs/0503066

openalex publication_date 2005/03/24 · openalex created_date 2022/08/08 · openalex updated_date 2026/07/28

Abstract

Management of communication by on-line routing in new FPGAs with a large\namount of logic resources and partial reconfigurability is a new challenging\nproblem. A Network-on-Chip\n (NoC) typically uses packet routing mechanism, which has often unsafe data\ntransfers, and network interface overhead. In this paper, circuit routing for\nsuch dynamic NoCs is investigated, and a practical 1-dimensional network with\nan efficient routing algorithm is proposed and implemented. Also, this concept\nhas been extended to the 2-dimensional case. The implementation results show\nthe low area overhead and high performance of this network.\n

Citations

• Networks on chips: a new SoC paradigm

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