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Nonvolatile SRAM architecture using MOSFET-based spin-transistors

2009/01/20 by Yusuke Shuto, Shuu’ichirou Yamamoto, Shuu'ichirou Yamamoto +4
Engineering · Physics and Astronomy · #Advancements in Semiconductor Devices and Circuit Design #FOS: Physical sciences #Ferroelectric and Negative Capacitance Devices #Magnetic properties of thin films #Materials Science (cond-mat.mtrl-sci) #cond-mat.mtrl-sci

paper · pdf · doi:10.48550/arxiv.0901.2980

12 pages, 4 figures

arxiv created 2009/01/20 · openalex publication_date 2009/01/20 · arxiv updated 2009/12/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

The authors proposed and computationally analyzed nonvolatile static random access memory (NV-SRAM) architecture using metal-oxide-semiconductor field-effect transistor (MOSFET) type of spin-transistors referred to as pseudo-spin-MOSFET (PS-MOSFET). PS-MOSFET is a new circuit approach to reproduce the functions of spin-transistors, based on recently progressed magnetoresistive random access memory (MRAM) technology. The proposed NV-SRAM cell can be simply configured by connecting two PS-MOSFETs to the storage nodes of a standard SRAM cell. The logic information of the storage nodes can be electrically stored into the magnetic tunnel junctions (MTJs) of the PS-MOSFETs by current-induced magnetization switching (CIMS), and the stored information is automatically restored when the inverter loop circuit wakes up. In addition, the proposed NV-SRAM cell has no influence on the performance of normal SRAM operations. Low power dissipation and high degree of freedom of MTJ design are also remarkable features for NV-SRAM using PS-MOSFETs.

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