Jiayin Qin
- HiVeGen -- Hierarchical LLM-based Verilog Generation for Scalable Chip Design
2024/12/06 by Jinwei Tang, Tang, Jinwei, Jiayin Qin +10 · 4 citations
Computer Science · #Artificial Intelligence (cs.AI) #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Machine Learning (cs.LG) #VLSI and Analog Circuit Testing
- RTGS: Real-Time 3D Gaussian Splatting SLAM via Multi-Level Redundancy Reduction
2025/10/08 by Leshu Li, Li, Leshu, Jiayin Qin +18 · 1 citation
Computer Science · Engineering · #Advanced Image and Video Retrieval Techniques #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Modular Robots and Swarm Intelligence #Robotics and Sensor-Based Localization