Ahmed Elkholy

1. Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers
   2018/04/16 by Ahmed Elkholy, Saurabh Saxena, Guanghua Shu +2 · 2 citations
   Engineering · #Advancements in PLL and VCO Technologies #Analog and Mixed-Signal Circuit Design #Radio Frequency Integrated Circuit Design