Garofalo, Angelo

1. A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference
   2020/10/08 by Ottavi, Gianmarco, Garofalo, Angelo, Tagliavini, Giuseppe +3 · 3 citations
   #FOS: Computer and information sciences #Hardware Architecture (cs.AR)
2. XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Network on RISC-V based IoT End Nodes
   2020/11/29 by Garofalo, Angelo, Tagliavini, Giuseppe, Conti, Francesco +2 · 1 citation
   #FOS: Computer and information sciences #Hardware Architecture (cs.AR)
3. MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products
   2025/05/19 by İslamoğlu, Gamze, Bertaccini, Luca, Prasad, Arpan Suravi +3 · 2 citations
   #FOS: Computer and information sciences #Hardware Architecture (cs.AR)
4. A Flexible Template for Edge Generative AI with High-Accuracy Accelerated Softmax & GELU
   2024/12/09 by Andrea Belano, Yvan Tortorella, Belano, Andrea +9 · 1 citation
   Computer Science · #Distributed and Parallel Computing Systems #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Neural Networks and Applications
5. Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience
   2024/12/29 by Francesco Conti, Angelo Garofalo, Conti, Francesco +7 · 1 citation
   Computer Science · Engineering · #CCD and CMOS Imaging Sensors #Embedded Systems Design Techniques #FOS: Computer and information sciences #FOS: Electrical engineering #Hardware Architecture (cs.AR) #Neural and Evolutionary Computing (cs.NE) #Parallel Computing and Optimization Techniques #Signal Processing (eess.SP) #electronic engineering #information engineering