Leveraging Residue Number System for Designing High-Precision Analog Deep Neural Network Accelerators

2023/06/15 by Cansu Demirkiran, Demirkiran, Cansu, Rashmi Agrawal +7
Computer Science · Engineering · #Cryptography and Residue Arithmetic #Emerging Technologies (cs.ET) #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Low-power high-performance VLSI design #Machine Learning (cs.LG) #Neural and Evolutionary Computing (cs.NE) #VLSI and Analog Circuit Testing

paper · pdf · doi:10.48550/arxiv.2306.09481

openalex publication_date 2023/06/15 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

Achieving high accuracy, while maintaining good energy efficiency, in analog DNN accelerators is challenging as high-precision data converters are expensive. In this paper, we overcome this challenge by using the residue number system (RNS) to compose high-precision operations from multiple low-precision operations. This enables us to eliminate the information loss caused by the limited precision of the ADCs. Our study shows that RNS can achieve 99% FP32 accuracy for state-of-the-art DNN inference using data converters with only 6-bit precision. We propose using redundant RNS to achieve a fault-tolerant analog accelerator. In addition, we show that RNS can reduce the energy consumption of the data converters within an analog accelerator by several orders of magnitude compared to a regular fixed-point approach.

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