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Design and analysis of digital communication within an SoC-based control system for trapped-ion quantum computing

2022/09/30 by Nafis Irtija, Jim Plusquellic, Irtija, Nafis +9 · 1 citation
Computer Science · Engineering · #FOS: Computer and information sciences #FOS: Physical sciences #Hardware Architecture (cs.AR) #Low-power high-performance VLSI design #Quantum Computing Algorithms and Architecture #Quantum Information and Cryptography #Quantum Physics (quant-ph)

paper · pdf · doi:10.48550/arxiv.2209.15601

openalex publication_date 2022/09/30 · openalex created_date 2022/10/04 · openalex updated_date 2026/07/28

Abstract

Electronic control systems used for quantum computing have become increasingly complex as multiple qubit technologies employ larger numbers of qubits with higher fidelity targets. Whereas the control systems for different technologies share some similarities, parameters like pulse duration, throughput, real-time feedback, and latency requirements vary widely depending on the qubit type. In this paper, we evaluate the performance of modern System-on-Chip (SoC) architectures in meeting the control demands associated with performing quantum gates on trapped-ion qubits, particularly focusing on communication within the SoC. A principal focus of this paper is the data transfer latency and throughput of several high-speed on-chip mechanisms on Xilinx multi-processor SoCs, including those that utilize direct memory access (DMA). They are measured and evaluated to determine an upper bound on the time required to reconfigure a gate parameter. Worst-case and average-case bandwidth requirements for a custom gate sequencer core are compared with the experimental results. The lowest-variability, highest-throughput data-transfer mechanism is DMA between the real-time processing unit (RPU) and the PL, where bandwidths up to 19.2 GB/s are possible. For context, this enables reconfiguration of qubit gates in less than 2μs, comparable to the fastest gate time. Though this paper focuses on trapped-ion control systems, the gate abstraction scheme and measured communication rates are applicable to a broad range of quantum computing technologies.

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