2026/04/07 by Qisheng Su, Shiting Huang, Zhen Fang +3 · 1 voice
Computer Science · #AI-based Problem Solving and Planning #Advanced Software Engineering Methodologies #Constraint Satisfaction and Optimization #Context (archaeology) #Forcing (mathematics) #Inefficiency #Inference #Metric (unit) #Quality (philosophy) #Security token #cs.PF #cs.SE
paper · pdf · doi:10.48550/arxiv.2604.05404
openalex publication_date 2026/04/07 · arxiv published 2026/04/07 · openalex created_date 2026/04/09 · arxiv updated 2026/04/14 · openalex updated_date 2026/07/28
In real-world Tool-Integrated Reasoning (TIR) scenarios, where LLMs interleave reasoning with external tool calls, a major source of inefficiency is that the toolcalls create pauses between LLM requests and cause KV-Cache eviction, forcing recomputation. Also, the long, unfiltered response returned by external tools inflates the KV-Cache, so each decode step spends more time loading the growing cache and thus becomes steadily slower as context length increases. However, existing efficiency metrics like token counts and toolcall counts fail to capture the real model inference latency. To address this, we introduce PTE (Prefill Token Equivalents), a hardware-aware TIR-efficiency metric that unifies internal reasoning and external tool-use costs while explicitly accounting for non-reusable KV-Cache and long-tool-response scenarios. Validation in a high-concurrency industrial setting indicates that PTE aligns significantly better with wall-clock latency than standard token counts, while maintaining consistent efficiency rankings across diverse hardware profiles. We conduct extensive experiments across five TIR benchmarks, quantify their PTE costs, and identify four inefficiency patterns that appear in TIR. We also discover that trajectories with higher PTE costs tend to have lower reasoning correctness, indicating that simply using more tools does not improve the quality of the answer.