1994/06/01 by James E. Smith, Shlomo Weiss · 1 citation
Computer Science · #Parallel Computing and Optimization Techniques #Embedded Systems Design Techniques #Advanced Data Storage Technologies #PowerPC #Computer science #Implementation #IBM #Reduced instruction set computing #Operating system #Computer architecture #Embedded system #Programming language #Instruction set #Software
paper · doi:10.1109/2.294853
openalex publication_date 1994/06/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/29
A discussion is given on two RISC implementations: from Digital Equipment Corporation, the Alpha 21064, and from IBM/Motorola/Apple, the PowerPC 601. Both are superscalar implementations, that is, they can sustain execution of two or more instructions per clock cycle. Otherwise, these two implementations present vastly different philosophies for achieving high performance. The PowerPC 601 focuses on powerful instructions and great flexibility in processing order, while the Alpha 21064 depends on a very fast clock, with simpler instructions and a more streamlined implementation structure. These two RISC microprocessors exemplify contrasting, but equally valid, implementation philosophies. An overview is given of the instruction sets and the authors emphasize the differences in design: PowerPC uses powerful instructions so that fewer are needed to get the job done; Alpha uses simple instructions so that the hardware can be kept simpler and faster. The authors also discuss the pipelined implementations of the two architectures; again, the contrast is between powerful and simple.>