2001/03/17 · 1 citation
Computer Science · #Computer architecture #Computer hardware #Computer science #Embedded Systems Design Techniques #Field-programmable gate array #Hardware description language #Programming language #Verilog
paper · doi:10.1109/ieeestd.2001.93352
openalex publication_date 2001/03/17 · openalex created_date 2025/10/10 · openalex updated_date 2026/06/09
Supersedes 1364-1995. The Verilog(R) Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable,it supports the development,verification, synthesis,and testing of hardware designs; the communication of hardware design data; and the maintenance,modification,and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.