A Novel Synchronous Reference Frame Frequency-Locked Loop

2019/08/23 by Xiangjun Quan, Quan, Xiangjun, Qinran Hu +7
Computer Science · Energy · Engineering · #Advancements in PLL and VCO Technologies #FOS: Electrical engineering #Microgrid Control and Optimization #Power Systems and Renewable Energy #Systems and Control (eess.SY) #cs.SY #eess.SY #electronic engineering #information engineering

paper · pdf · doi:10.48550/arxiv.1908.08669

4 pages, 6 figures

openalex publication_date 2019/08/23 · arxiv created 2019/09/26 · arxiv updated 2019/09/27 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

This letter proposes a new design of frequency-locked loop (FLL) which is based on synchronous (dq) reference frame instead of stationary (α\beta) reference frame. First, a synchronous reference frame FLL (briefly called SRF-FLL0) equivalent to the conventional FLL is proposed. Then the SRF-FLL0 is improved by utilizing the phase error to acquire a better performance. The small-signal modeling and parameter tuning of the improved synchronous reference frame FLL (SRF-FLL) are presented. Finally, the theoretical analysis and experiment results verify the superiority and effectiveness of proposed SRF-FLL.

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