1970/04/01 by G. F. Amelio, M.F. Tompsett, George Smith · 3 citations
Engineering · #Semiconductor materials and devices #Advancements in Semiconductor Devices and Circuit Design #Advanced Memory and Neural Computing
paper · doi:10.1002/j.1538-7305.1970.tb01791.x
openalex publication_date 1970/04/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/29
Structures have been fabricated consisting of closely spaced MOS capacitors on an n-type silicon substrate. By forming a depletion region under one of the electrodes, minority carriers (holes) may be stored in the resulting potential well. This charge may then be transferred to an adjacent electrode by proper manipulation of electrode potentials. The assumption that this transfer will take place in reasonable times with a small fractional loss of charge is the basis of the charge coupled devices described in the preceding paper,1To test this assumption, devices were fabricated and measurements made. Charge transfer efficiencies greater than 98 percent for transfer times less than 100 nsec were observed.