2008/08/01 by Leif Uhsadel, Andy Georges, Ingrid Verbauwhede · 2 citations
Computer Science · #Security and Verification in Computing #Advanced Malware Detection Techniques #Parallel Computing and Optimization Techniques
paper · doi:10.1109/fdtc.2008.19
openalex publication_date 2008/08/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/29
We introduce the usage of hardware performance counters (HPCs) as a new method that allows very precise access to known side channels and also allows access to many new side channels. Many current architectures provide hardware performance counters, which allow the profiling of software during runtime. Though they allow detailed profiling they are noisy by their very nature; HPC hardware is not validated along with the rest of the microprocessor. They are meant to serve as a relative measure and are most commonly used for profiling software projects or operating systems. Furthermore they are only accessible in restricted mode and can only be accessed by the operating system. We discuss this security model and we show first implementation results, which confirm that HPCs can be used to profile relatively short sequences of instructions with high precision. We focus on cache profiling and confirm our results by rerunning a recently published time based cache attack in which we replaced the time profiling function by HPCs.