1981/05/01 by David B. Tuckerman, R. F. W. Pease · 6 citations
Engineering · #3D IC and TSV technologies #Advancements in Semiconductor Devices and Circuit Design #Semiconductor materials and devices
paper · doi:10.1109/edl.1981.25367
openalex publication_date 1981/05/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/08/04
The problem of achieving compact, high-performance forced liquid cooling of planar integrated circuits has been investigated. The convective heat-transfer coefficient h between the substrate and the coolant was found to be the primary impediment to achieving low thermal resistance. For laminar flow in confined channels, h scales inversely with channel width, making microscopic channels desirable. The coolant viscosity determines the minimum practical channel width. The use of high-aspect ratio channels to increase surface area will, to an extent, further reduce thermal resistance. Based on these considerations, a new, very compact, water-cooled integral heat sink for silicon integrated circuits has been designed and tested. At a power density of 790 W/cm2, a maximum substrate temperature rise of 71°C above the input water temperature was measured, in good agreement with theory. By allowing such high power densities, the heat sink may greatly enhance the feasibility of ultrahigh-speed VLSI circuits.