Design and Analysis of Approximate Compressors for Multiplication

2014/02/25 by Amir Momeni, Jie Han, Paolo Montuschi +1 · 12 citations
Engineering · #Low-power high-performance VLSI design #Analog and Mixed-Signal Circuit Design #Advancements in Semiconductor Devices and Circuit Design

paper · doi:10.1109/tc.2014.2308214

Abstract

Inexact (or approximate) computing is an attractive paradigm for digital processing at nanometric scales. Inexact computing is particularly interesting for computer arithmetic designs. This paper deals with the analysis and design of two new approximate 4-2 compressors for utilization in a multiplier. These designs rely on different features of compression, such that imprecision in computation (as measured by the error rate and the so-called normalized error distance) can meet with respect to circuit-based figures of merit of a design (number of transistors, delay and power consumption). Four different schemes for utilizing the proposed approximate compressors are proposed and analyzed for a Dadda multiplier. Extensive simulation results are provided and an application of the approximate multipliers to image processing is presented. The results show that the proposed designs accomplish significant reductions in power dissipation, delay and transistor count compared to an exact design; moreover, two of the proposed multiplier designs provide excellent capabilities for image multiplication with respect to average normalized error distance and peak signal-to-noise ratio (more than 50 dB for the considered image examples).

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• Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers
• Design and Analysis of Approximate 4–2 Compressors for High-Accuracy Multipliers
• Low Power Approximate Multiplier Architecture for Deep Neural Networks
• Processing-In-Memory Acceleration of Convolutional Neural Networks for Energy-Efficiency, and Power-Intermittency Resilience
• Optimised Convolution Layers of DnCNN using Vedic Multiplier and Hyperparameter Tuning in Cancer Detection on Field Programmable Gate Array [europepmc]
• Optimized NCFET-based approximate multiplier for energy-aware image applications. [europepmc]
• Design of high-performance, accurate, and approximate Dadda-tree multipliers for image processing applications. [europepmc]
• Area efficient approximate multiplier based on novel 4:2 compressors and error correction logic. [europepmc]
• Design of low power and high speed approximate multipliers utilizing current mode 4 to 2 compressors based on CNTFET technology. [europepmc]

Related

• Design and Analysis of Approximate 4–2 Compressors for High-Accuracy Multipliers
• Comparative Study of Approximate Multipliers
• RoBA Multiplier: A Rounding-Based Approximate Multiplier for High-Speed yet Energy-Efficient Digital Signal Processing
• Introducing a new CMOS-MTJ architecture for fast and highly low power 4:2 approximate compressors: insights into their applications in image processing
• Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits