2016/07/20 by Reza Zendegani, Mehdi Kamal, Milad Bahadori +3 · 1 citation
Computer Science · Engineering · #Analog and Mixed-Signal Circuit Design #Low-power high-performance VLSI design #Numerical Methods and Algorithms
paper · doi:10.1109/tvlsi.2016.2587696
openalex publication_date 2016/07/20 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/29
In this paper, we propose an approximate multiplier that is high speed yet energy efficient. The approach is to round the operands to the nearest exponent of two. This way the computational intensive part of the multiplication is omitted improving speed and energy consumption at the price of a small error. The proposed approach is applicable to both signed and unsigned multiplications. We propose three hardware implementations of the approximate multiplier that includes one for the unsigned and two for the signed operations. The efficiency of the proposed multiplier is evaluated by comparing its performance with those of some approximate and accurate multipliers using different design parameters. In addition, the efficacy of the proposed approximate multiplier is studied in two image processing applications, i.e., image sharpening and smoothing.