A 5.8 GHz 1 V Linear Power Amplifier Using a Novel On-Chip Transformer Power Combiner in Standard 90 nm CMOS

2008/04/28 by Peter Haldi, Debopriyo Chowdhury, Patrick Reynaert +2 · 1 citation
Engineering · #Radio Frequency Integrated Circuit Design #Advanced Power Amplifier Design #Microwave Engineering and Waveguides

paper · doi:10.1109/jssc.2008.920347

Abstract

A fully integrated 5.8 GHz Class AB linear power amplifier (PA) in a standard 90 nm CMOS process using thin oxide transistors utilizes a novel on-chip transformer power combining network. The transformer combines the power of four push-pull stages with low insertion loss over the bandwidth of interest and is compatible with standard CMOS process without any additional analog or RF enhancements. With a 1 V power supply, the PA achieves 24.3 dBm maximum output power at a peak drain efficiency of 27% and 20.5 dBm output power at the 1 dB compression point.

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• A State-of-the-Art Review on CMOS Radio Frequency Power Amplifiers for Wireless Communication Systems. [europepmc]

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