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The failure risk analysis of digital circuits

2013/03/17 by Alexander N. Pchelintsev, Pchelintsev, A. N.
Computer Science · Engineering · #06E25 #06E30 #94C05 #Discrete Mathematics (cs.DM) #FOS: Computer and information sciences #Integrated Circuits and Semiconductor Failure Analysis #Physical Unclonable Functions (PUFs) and Hardware Security #VLSI and Analog Circuit Testing

paper · pdf · doi:10.48550/arxiv.1303.4051

openalex publication_date 2013/03/17 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

To analyze the failure risk of asynchronous digital circuits the time-parameter is introduced into the Boolean algebra replacing the arithmetic operations by logical operations. There considered an example of construction of signals passing through the logical elements, using the described below mathematical apparatus.

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