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A Fault-tolerant Structure for Reliable Multi-core Systems Based on Hardware-Software Co-design

2009/10/20 by Bingbing Xia, Xia, Bingbing, Fei Qiao +5
Computer Science · Engineering · #Distributed systems and fault tolerance #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Radiation Effects in Electronics #Software Reliability and Analysis Research #cs.AR

paper · pdf · doi:10.48550/arxiv.0910.3736

7 pages, 5 figures

arxiv created 2009/10/20 · openalex publication_date 2009/10/20 · arxiv updated 2016/09/08 · openalex created_date 2019/06/27 · openalex updated_date 2026/07/28

Abstract

To cope with the soft errors and make full use of the multi-core system, this paper gives an efficient fault-tolerant hardware and software co-designed architecture for multi-core systems. And with a not large number of test patterns, it will use less than 33% hardware resources compared with the traditional hardware redundancy (TMR) and it will take less than 50% time compared with the traditional software redundancy (time redundant).Therefore, it will be a good choice for the fault-tolerant architecture for the future high-reliable multi-core systems.

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