2019/06/28 by Kaiqi Zhang, Xiyuan Zhang, Zhang, Kaiqi +3
Computer Science · Engineering · Mathematics · #Algorithm #Computation #Computational science #Computer engineering #Computer hardware #Computer science #FOS: Computer and information sciences #FOS: Electrical engineering #Field-programmable gate array #Floating point #Hardware Architecture (cs.AR) #Mathematics #Matrix Theory and Algorithms #Matrix decomposition #Parallel Computing and Optimization Techniques #Parallel computing #Programming language #Set (abstract data type) #Signal Processing (eess.SP) #Singular value decomposition #Software #Speedup #Tensor (intrinsic definition) #Tensor decomposition #Tensor decomposition and applications #Theoretical computer science #Tucker decomposition #cs.AR #eess.SP #electronic engineering #information engineering
paper · pdf · doi:10.48550/arxiv.1907.01522
Accepted by ICCAD 2019
arxiv created 2019/06/28 · openalex publication_date 2019/06/28 · arxiv updated 2019/07/05 · openalex created_date 2025/10/10 · openalex updated_date 2026/08/05
Tensor computation has emerged as a powerful mathematical tool for solving high-dimensional and/or extreme-scale problems in science and engineering. The last decade has witnessed tremendous advancement of tensor computation and its applications in machine learning and big data. However, its hardware optimization on resource-constrained devices remains an (almost) unexplored field. This paper presents an hardware accelerator for a classical tensor computation framework, Tucker decomposition. We study three modules of this architecture: tensor-times-matrix (TTM), matrix singular value decomposition (SVD), and tensor permutation, and implemented them on Xilinx FPGA for prototyping. In order to further reduce the computing time, a warm-start algorithm for the Jacobi iterations in SVD is proposed. A fixed-point simulator is used to evaluate the performance of our design. Some synthetic data sets and a real MRI data set are used to validate the design and evaluate its performance. We compare our work with state-of-the-art software toolboxes running on both CPU and GPU, and our work shows 2.16 - 30.2x speedup on the cardiac MRI data set.