2020/02/18 by Shervin Roshanisefat, Hadi Mardani Kamali, Roshanisefat, Shervin +11
Computer Science · Engineering · #Physical Unclonable Functions (PUFs) and Hardware Security #Integrated Circuits and Semiconductor Failure Analysis #VLSI and Analog Circuit Testing
paper · pdf · doi:10.48550/arxiv.2002.07857
In this paper, we introduce DFSSD, a novel logic locking solution for\nsequential and FSM circuits with a restricted (locked) access to the scan\nchain. DFSSD combines two techniques for obfuscation: (1) Deep Faults, and (2)\nShallow State Duality. Both techniques are specifically designed to resist\nagainst sequential SAT attacks based on bounded model checking. The shallow\nstate duality prevents a sequential SAT attack from taking a shortcut for early\ntermination without running an exhaustive unbounded model checker to assess if\nthe attack could be terminated. The deep fault, on the other hand, provides a\ndesigner with a technique for building deep, yet key recoverable faults that\ncould not be discovered by sequential SAT (and bounded model checker based)\nattacks in a reasonable time.\n