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Efficient Realization of Givens Rotation through Algorithm-Architecture Co-design for Acceleration of QR Factorization

2018/03/14 by Farhad Merchant, Merchant, Farhad, Tarun Vatwani +12
Computer Science · #Distributed #Embedded Systems Design Techniques #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Interconnection Networks and Systems #Mathematical Software (cs.MS) #Parallel #Video Coding and Compression Technologies #and Cluster Computing (cs.DC) #cs.AR #cs.DC #cs.MS

paper · pdf · doi:10.48550/arxiv.1803.05320

openalex publication_date 2018/03/14 · arxiv created 2018/03/23 · arxiv updated 2018/03/26 · openalex created_date 2018/03/29 · openalex updated_date 2026/07/28

Abstract

We present efficient realization of Generalized Givens Rotation (GGR) based QR factorization that achieves 3-100x better performance in terms of Gflops/watt over state-of-the-art realizations on multicore, and General Purpose Graphics Processing Units (GPGPUs). GGR is an improvement over classical Givens Rotation (GR) operation that can annihilate multiple elements of rows and columns of an input matrix simultaneously. GGR takes 33% lesser multiplications compared to GR. For custom implementation of GGR, we identify macro operations in GGR and realize them on a Reconfigurable Data-path (RDP) tightly coupled to pipeline of a Processing Element (PE). In PE, GGR attains speed-up of 1.1x over Modified Householder Transform (MHT) presented in the literature. For parallel realization of GGR, we use REDEFINE, a scalable massively parallel Coarse-grained Reconfigurable Architecture, and show that the speed-up attained is commensurate with the hardware resources in REDEFINE. GGR also outperforms General Matrix Multiplication (gemm) by 10% in-terms of Gflops/watt which is counter-intuitive.

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