2022/01/16 by Yuke Zhang, Yinghua Hu, Zhang, Yuke +5 · 1 citation
Computer Science · Engineering · #Cryptography and Security (cs.CR) #FOS: Computer and information sciences #FOS: Electrical engineering #Integrated Circuits and Semiconductor Failure Analysis #Physical Unclonable Functions (PUFs) and Hardware Security #Security and Verification in Computing #Systems and Control (eess.SY) #electronic engineering #information engineering
paper · pdf · doi:10.48550/arxiv.2201.05943
openalex publication_date 2022/01/16 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Sequential logic locking has been studied over the last decade as a method to protect sequential circuits from reverse engineering. However, most of the existing sequential logic locking techniques are threatened by increasingly more sophisticated SAT-based attacks, efficiently using input queries to a SAT solver to rule out incorrect keys, as well as removal attacks based on structural analysis. In this paper, we propose TriLock, a sequential logic locking method that simultaneously addresses these vulnerabilities. TriLock can achieve high, tunable functional corruptibility while still guaranteeing exponential queries to the SAT solver in a SAT-based attack. Further, it adopts a state re-encoding method to obscure the boundary between the original state registers and those inserted by the locking method, thus making it more difficult to detect and remove the locking-related components.