2021/11/10 by Nick Brown, Brown, Nick
Computer Science · #Advanced Data Storage Technologies #Distributed #Distributed and Parallel Computing Systems #FOS: Computer and information sciences #Parallel #Parallel Computing and Optimization Techniques #and Cluster Computing (cs.DC)
paper · pdf · doi:10.48550/arxiv.2111.05651
openalex publication_date 2021/11/10 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Engineering is an important domain for supercomputing, with the Alya model\nbeing a popular code for undertaking such simulations. With ever increasing\ndemand from users to model larger, more complex systems at reduced time to\nsolution it is important to explore the role that novel hardware technologies,\nsuch as FPGAs, can play in accelerating these workloads on future exascale\nsystems.\n In this paper we explore the porting of Alya's incompressible flow matrix\nassembly kernel, which accounts for a large proportion of the model runtime,\nonto FPGAs. After describing in detail successful strategies for optimisation\nat the kernel level, we then explore sharing the workload between the FPGA and\nhost CPU, mapping most appropriate parts of the kernel between these\ntechnologies, enabling us to more effectively exploit the FPGA. We then compare\nthe performance of our approach on a Xilinx Alveo U280 against a 24-core Xeon\nPlatinum CPU and Nvidia V100 GPU, with the FPGA significantly out-performing\nthe CPU and performing comparably against the GPU, whilst drawing substantially\nless power. The result of this work is both an experience report describing\nappropriate dataflow optimisations which we believe can be applied more widely\nas a case-study across HPC codes, and a performance comparison for this\nspecific workload that demonstrates the potential for FPGAs in accelerating HPC\nengineering simulations.\n