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Superior surface modification layer of poly(styrene) on SiO2 gate insulator in rubrene single crystal field-effect transistor

2023/08/14 by Huaxue Zhou, Chongli Yang, Zhou, Hua-Xue +11
Engineering · #Advanced Memory and Neural Computing #Advancements in Semiconductor Devices and Circuit Design #FOS: Physical sciences #Materials Science (cond-mat.mtrl-sci) #Semiconductor materials and devices

paper · pdf · doi:10.48550/arxiv.2308.06903

openalex publication_date 2023/08/14 · openalex created_date 2023/08/16 · openalex updated_date 2026/07/28

Abstract

We conduct comparative research on the density of states of electron- and hole- carrier trap levels (DTR(E)), dispersing inside the energy gap of a rubrene single crystal in a field effect transistor (FET) struction with Ca and Au hetero-electrodes for an ambipolar carrier injection mode, by using polymeric protection-layer materials on a Si substrate. Three different types of polymeric materials, poly(methyl-methacrylate) (PMMA), poly(styrene) (PS) and poly(chloro-styrene) (PCS) are employed. From the temperature (T)-dependent source-drain current and gate voltage (ISD-VG) transfer characteristics, the values of DTR(E) are evaluated. PS exhibits the most efficiently-balanced ambipolar carrier transport, which is superior to PMMA that is most typically used as the standard protection layer on a SiO2/doped-Si substrate. Discussions are made in the framework of a carrier multiple trap and release (CMTR) model.

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