Testbeam Characterization of a SiGe BiCMOS Monolithic Silicon Pixel Detector with Internal Gain Layer

2024/12/10 by L. Paolozzi, Paolozzi, L., Matteo Milanesio +47
Engineering · Physics and Astronomy · #CCD and CMOS Imaging Sensors #Particle Detector Development and Performance #Thin-Film Transistor Technologies

paper · pdf · doi:10.48550/arxiv.2412.07606

Abstract

A monolithic silicon pixel ASIC prototype, produced in 2024 as part of the Horizon 2020 MONOLITH ERC Advanced project, was tested with a 120 GeV/c pion beam. The ASIC features a matrix of hexagonal pixels with a 100 μm pitch, read by low-noise, high-speed front-end electronics built using 130 nm SiGe BiCMOS technology. It includes the PicoAD sensor, which employs a continuous, deep PN junction to generate avalanche gain. Data were taken across power densities from 0.05 to 2.6 W/cm2 and sensor bias voltages from 90 to 180 V. At the highest bias voltage, corresponding to an electron gain of 50, and maximum power density, an efficiency of (99.99 ± 0.01)% was achieved. The time resolution at this working point was (24.3 ± 0.2) ps before time-walk correction, improving to (12.1 ± 0.3) ps after correction.

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