IMCRYPTO: An In-Memory Computing Fabric for AES Encryption and Decryption

2021/12/04 by Reis, Dayane, Geng, Haoran, Niemier, Michael +1 · 3 citations
#Cryptography and Security (cs.CR) #Emerging Technologies (cs.ET) #FOS: Computer and information sciences #Hardware Architecture (cs.AR)

paper · doi:10.48550/arxiv.2112.02231

Abstract

This paper proposes IMCRYPTO, an in-memory computing (IMC) fabric for accelerating AES encryption and decryption. IMCRYPTO employs a unified structure to implement encryption and decryption in a single hardware architecture, with combined (Inv)SubBytes and (Inv)MixColumns steps. Because of this step-combination, as well as the high parallelism achieved by multiple units of random-access memory (RAM) and random-access/content-addressable memory (RA/CAM) arrays, IMCRYPTO achieves high throughput encryption and decryption without sacrificing area and power consumption. Additionally, due to the integration of a RISC-V core, IMCRYPTO offers programmability and flexibility. IMCRYPTO improves the throughput per area by a minimum (maximum) of 3.3x (223.1x) when compared to previous ASICs/IMC architectures for AES-128 encryption. Projections show added benefit from emerging technologies of up to 5.3x to the area-delay-power product of IMCRYPTO.

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• CryptoSRAM: Enabling High-Throughput Cryptography on MCUs via In-SRAM Computing

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