2023/05/01 by Carl Brando, Brando, Carl, Minseong Park +9
Computer Science · Engineering · #Advanced Memory and Neural Computing #CCD and CMOS Imaging Sensors #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Neural Networks and Applications
paper · pdf · doi:10.48550/arxiv.2305.00618
openalex publication_date 2023/05/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
This paper introduces a novel simulation tool for analyzing and training neural network models tailored for compute-in-memory hardware. The tool leverages physics-based device models to enable the design of neural network models and their parameters that are more hardware-accurate. The initial study focused on modeling a CMOS-based floating-gate transistor and memristor device using measurement data from a fabricated device. Additionally, the tool incorporates hardware constraints, such as the dynamic range of data converters, and allows users to specify circuit-level constraints. A case study using the MNIST dataset and LeNet-5 architecture demonstrates the tool's capability to estimate area, power, and accuracy. The results showcase the potential of the proposed tool to optimize neural network models for compute-in-memory hardware.