2023/04/07 by Liu Liu, Liu, Liu, Shubham Kumar +8
Engineering · Materials Science · #Emerging Technologies (cs.ET) #FOS: Computer and information sciences #Ferroelectric and Negative Capacitance Devices #MXene and MAX Phase Materials #Semiconductor materials and devices
paper · pdf · doi:10.48550/arxiv.2304.03868
openalex publication_date 2023/04/07 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Ternary content addressable memory (TCAM), widely used in network routers and high-associativity caches, is gaining popularity in machine learning and data-analytic applications. Ferroelectric FETs (FeFETs) are a promising candidate for implementing TCAM owing to their high ON/OFF ratio, non-volatility, and CMOS compatibility. However, conventional single-gate FeFETs (SG-FeFETs) suffer from relatively high write voltage, low endurance, potential read disturbance, and face scaling challenges. Recently, a double-gate FeFET (DG-FeFET) has been proposed and outperforms SG-FeFETs in many aspects. This paper investigates TCAM design challenges specific to DG-FeFETs and introduces a novel 1.5T1Fe TCAM design based on DG-FeFETs. A 2-step search with early termination is employed to reduce the cell area and improve energy efficiency. A shared driver design is proposed to reduce the peripherals area. Detailed analysis and SPICE simulation show that the 1.5T1Fe DG-TCAM leads to superior search speed and energy efficiency. The 1.5T1Fe TCAM design can also be built with SG-FeFETs, which achieve search latency and energy improvement compared with 2FeFET TCAM.