Application-driven Design Exploration for Dense Ferroelectric Embedded\n Non-volatile Memories

2021/06/17 by Mohammad Mehdi Sharifi, Sharifi, Mohammad Mehdi, Lillian Pentecost +19
Engineering · #Advanced Memory and Neural Computing #Advanced Sensor and Energy Harvesting Materials #Distributed #FOS: Computer and information sciences #Ferroelectric and Negative Capacitance Devices #Parallel #and Cluster Computing (cs.DC)

paper · pdf · doi:10.48550/arxiv.2106.11757

openalex publication_date 2021/06/17 · openalex created_date 2022/07/25 · openalex updated_date 2026/07/28

Abstract

The memory wall bottleneck is a key challenge across many data-intensive\napplications. Multi-level FeFET-based embedded non-volatile memories are a\npromising solution for denser and more energy-efficient on-chip memory.\nHowever, reliable multi-level cell storage requires careful optimizations to\nminimize the design overhead costs. In this work, we investigate the interplay\nbetween FeFET device characteristics, programming schemes, and memory array\narchitecture, and explore different design choices to optimize performance,\nenergy, area, and accuracy metrics for critical data-intensive workloads. From\nour cross-stack design exploration, we find that we can store DNN weights and\nsocial network graphs at a density of over 8MB/mm² and sub-2ns read access\nlatency without loss in application accuracy.\n

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