Soysal, Melina

1. Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis
   2024/05/09 by İsmail Emir Yüksel, Yuksel, Ismail Emir, Yahya Can Tuğrul +19 · 6 citations
   Engineering · #Advancements in Semiconductor Devices and Circuit Design #Distributed #FOS: Computer and information sciences #Ferroelectric and Negative Capacitance Devices #Hardware Architecture (cs.AR) #Parallel #Semiconductor materials and devices #and Cluster Computing (cs.DC)
2. PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips
   2023/12/05 by İsmail Emir Yüksel, Yuksel, Ismail Emir, Yahya Can Tuğrul +19 · 3 citations
   Computer Science · Engineering · #Advanced Memory and Neural Computing #Distributed #FOS: Computer and information sciences #Ferroelectric and Negative Capacitance Devices #Hardware Architecture (cs.AR) #Parallel #Parallel Computing and Optimization Techniques #and Cluster Computing (cs.DC)
3. Proteus: Enabling High-Performance Processing-Using-DRAM with Dynamic Bit-Precision, Adaptive Data Representation, and Flexible Arithmetic
   2025/01/29 by Geraldo F. Oliveira, Mayank Kabra, Oliveira, Geraldo F. +19 · 4 citations
   Computer Science · Engineering · #Distributed #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Low-power high-performance VLSI design #Parallel #Parallel Computing and Optimization Techniques #VLSI and FPGA Design Techniques #and Cluster Computing (cs.DC)
4. MARS: Processing-In-Memory Acceleration of Raw Signal Genome Analysis Inside the Storage Subsystem
   2025/06/12 by Soysal, Melina, Koliogeorgi, Konstantina, Firtina, Can +8 · 2 citations
   #FOS: Biological sciences #FOS: Computer and information sciences #Genomics (q-bio.GN) #Hardware Architecture (cs.AR)