Zhirui Zong

1. A 31-μ W, 148-fs Step, 9-bit Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter in 28-nm CMOS
   2019/09/27 by Peng Chen, Feifei Zhang, Zhirui Zong +3 · 2 citations
   Engineering · #Analog and Mixed-Signal Circuit Design #Advancements in PLL and VCO Technologies #Radio Frequency Integrated Circuit Design