Yongsun Lee

1. A Low-Jitter and Low-Fractional-Spur Ring-DCO-Based Fractional-<i>N</i> Digital PLL Using a DTC’s Second-/Third-Order Nonlinearity Cancellation and a Probability-Density-Shaping ΔΣM
   2022/01/24 by Chanwoong Hwang, Hangi Park, Yongsun Lee +2 · 10 citations
   Engineering · #Advancements in PLL and VCO Technologies #Analog and Mixed-Signal Circuit Design #Radio Frequency Integrated Circuit Design
2. A 320-fs RMS Jitter and – 75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC
   2019/06/17 by Taeho Seong, Yongsun Lee, Seyeon Yoo +1 · 2 citations
   Engineering · #Advancements in PLL and VCO Technologies #Radio Frequency Integrated Circuit Design #Photonic and Optical Devices