Bhandari, Jitendra

1. Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AI
   2024/11/21 by Bhandari, Jitendra, Bhat, Vineet, He, Yuheng +3 · 6 citations
   #FOS: Computer and information sciences #Hardware Architecture (cs.AR)
2. LLM-Aided Testbench Generation and Bug Detection for Finite-State Machines
   2024/06/24 by Jitendra Bhandari, Johann Knechtel, Bhandari, Jitendra +7 · 4 citations
   Computer Science · Engineering · #VLSI and Analog Circuit Testing #Real-time simulation and control systems #Parallel Computing and Optimization Techniques
3. VeriContaminated: Assessing LLM-Driven Verilog Coding for Data Contamination
   2025/03/17 by Wang, Zeng, Shao, Minghao, Bhandari, Jitendra +5 · 8 citations
   #Cryptography and Security (cs.CR) #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Machine Learning (cs.LG)
4. VeriLeaky: Navigating IP Protection vs Utility in Fine-Tuning for LLM-Driven Verilog Coding
   2025/03/17 by Wang Zeng, Wang, Zeng, Minghao Shao +17 · 8 citations
   Computer Science · Engineering · #Cryptography and Security (cs.CR) #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Low-power high-performance VLSI design #Machine Learning (cs.LG) #Physical Unclonable Functions (PUFs) and Hardware Security #VLSI and Analog Circuit Testing
5. RTL-Breaker: Assessing the Security of LLMs against Backdoor Attacks on HDL Code Generation
   2024/11/26 by Lakshmi Likhitha Mankali, Jitendra Bhandari, Mankali, Lakshmi Likhitha +11 · 4 citations
   Computer Science · Engineering · #Cryptographic Implementations and Security #Cryptography and Security (cs.CR) #Electrostatic Discharge in Electronics #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Security and Verification in Computing
6. Exploring eFPGA-based Redaction for IP Protection
   2021/10/26 by Bhandari, Jitendra, Moosa, Abdul Khader Thalakkattu, Tan, Benjamin +6 · 2 citations
   #Cryptography and Security (cs.CR) #FOS: Computer and information sciences
7. SALAD: Systematic Assessment of Machine Unlearning on LLM-Aided Hardware Design
   2025/06/02 by Wang, Zeng, Shao, Minghao, Karn, Rupesh +6 · 7 citations
   #Artificial Intelligence (cs.AI) #Cryptography and Security (cs.CR) #FOS: Computer and information sciences #Machine Learning (cs.LG)
8. VeriLoC: Line-of-Code Level Prediction of Hardware Design Quality from Verilog Code
   2025/06/08 by Hemadri, Raghu Vamshi, Bhandari, Jitendra, Nakkab, Andre +5 · 4 citations
   #Artificial Intelligence (cs.AI) #FOS: Computer and information sciences #Hardware Architecture (cs.AR)
9. ASCENT: Amplifying Power Side-Channel Resilience via Learning & Monte-Carlo Tree Search
   2024/06/27 by Bhandari, Jitendra, Chowdhury, Animesh Basak, Nabeel, Mohammed +4 · 1 citation
   #Cryptography and Security (cs.CR) #FOS: Computer and information sciences #Machine Learning (cs.LG)
10. Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction
    2021/11/08 by Bhandari, Jitendra, Moosa, Abdul Khader Thalakkattu, Tan, Benjamin +6 · 1 citation
    #Cryptography and Security (cs.CR) #FOS: Computer and information sciences #Hardware Architecture (cs.AR)