Lee, Donghyuk
- Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM
2016/11/30 by Vivek Seshadri, Donghyuk Lee, Seshadri, Vivek +17 · 9 citations
Computer Science · Engineering · #Advanced Memory and Neural Computing #FOS: Computer and information sciences #Ferroelectric and Negative Capacitance Devices #Hardware Architecture (cs.AR) #Parallel Computing and Optimization Techniques
- RowClone: Accelerating Data Movement and Initialization Using DRAM
2018/05/07 by Vivek Seshadri, Yoongu Kim, Seshadri, Vivek +19 · 1 voice · 2 citations
Computer Science · #Advanced Data Storage Technologies #Embedded Systems Design Techniques #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Parallel Computing and Optimization Techniques #cs.AR
- What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study
2018/07/13 by Saugata Ghose, A. Giray Yağlıkçı, Ghose, Saugata +21 · 3 citations
Computer Science · Engineering · #Advanced Data Storage Technologies #FOS: Computer and information sciences #Ferroelectric and Negative Capacitance Devices #Green IT and Sustainability #Hardware Architecture (cs.AR) #Parallel Computing and Optimization Techniques
- GRIM-filter: fast seed filtering in read mapping using emerging memory technologies
2017/08/14 by Kim, Jeremie S, Senol, Damla, Xin, Hongyi +7 · 1 citation
#FOS: Biological sciences #Genomics (q-bio.GN)
- RowHammer: Reliability Analysis and Security Implications
2016/02/18 by Yoongu Kim, Ross Daly, Kim, Yoongu +18 · 1 citation
Computer Science · #Advanced Malware Detection Techniques #Cryptography and Security (cs.CR) #Distributed #FOS: Computer and information sciences #Parallel #Parallel Computing and Optimization Techniques #Security and Verification in Computing #and Cluster Computing (cs.DC) #cs.CR #cs.DC
- Exploiting the DRAM Microarchitecture to Increase Memory-Level Parallelism
2018/05/04 by Yoongu Kim, Kim, Yoongu, Vivek Seshadri +7 · 1 voice
Computer Science · #Embedded Systems Design Techniques #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Interconnection Networks and Systems #Parallel Computing and Optimization Techniques #cs.AR
- Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency
2018/05/08 by Kevin K. Chang, Chang, Kevin K., Abdullah Giray Yaglıkçı +17 · 1 voice
Computer Science · #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #cs.AR
- SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure
2018/05/08 by Hasan Hassan, Hassan, Hasan, Nandita Vijaykumar +15 · 1 voice
Computer Science · #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #cs.AR
- Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips
2018/05/08 by Kevin K. Chang, Abhijith Kashyap, Chang, Kevin K. +17 · 1 voice
Computer Science · #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #cs.AR
- Adaptive-Latency DRAM: Reducing DRAM Latency by Exploiting Timing Margins
2018/05/04 by Donghyuk Lee, Yoongu Kim, Lee, Donghyuk +13 · 1 voice
Computer Science · Engineering · #Advanced Data Storage Technologies #FOS: Computer and information sciences #Ferroelectric and Negative Capacitance Devices #Hardware Architecture (cs.AR) #Low-power high-performance VLSI design #Parallel Computing and Optimization Techniques #cs.AR
- Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency
2018/05/08 by Hasan Hassan, Gennady Pekhimenko, Hassan, Hasan +11 · 1 voice
Computer Science · #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #cs.AR
- Reducing DRAM Latency at Low Cost by Exploiting Heterogeneity
2016/04/27 by Donghyuk Lee, Lee, Donghyuk · 1 voice
Computer Science · #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #cs.AR
- Tiered-Latency DRAM: Enabling Low-Latency Main Memory at Low Cost
2018/05/04 by Donghyuk Lee, Lee, Donghyuk, Yoongu Kim +9 · 1 voice
Computer Science · #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #cs.AR
- LISA: Increasing Internal Connectivity in DRAM for Fast Data Movement and Low Latency
2018/05/08 by Kevin K. Chang, Chang, Kevin K., Prashant J. Nair +9 · 1 voice
Computer Science · #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #cs.AR