Schmid, Ulrich

1. A Framework for Automated Competitive Analysis of On-line Scheduling of Firm-Deadline Tasks
   2014/09/08 by Krishnendu Chatterjee, Chatterjee, Krishnendu, Andreas Pavlogiannis +5 · 1 voice
   Computer Science · Engineering · #Data Structures and Algorithms (cs.DS) #FOS: Computer and information sciences #FOS: Electrical engineering #Systems and Control (eess.SY) #cs.DS #eess.SY #electronic engineering #information engineering
2. A Faithful Binary Circuit Model with Adversarial Noise
   2020/06/15 by Matthias Függer, Függer, Matthias, Jürgen Maier +7 · 1 citation
   Engineering · Computer Science · #Integrated Circuits and Semiconductor Failure Analysis #VLSI and Analog Circuit Testing #Low-power high-performance VLSI design
3. A Composable Glitch-Aware Delay Model
   2021/04/22 by Maier, Jürgen, Öhlinger, Daniel, Schmid, Ulrich +2 · 1 citation
   #B.8.1 #B.8.2 #FOS: Computer and information sciences #FOS: Electrical engineering #Other Computer Science (cs.OH) #Signal Processing (eess.SP) #electronic engineering #information engineering
4. A Digital Delay Model Supporting Large Adversarial Delay Variations
   2023/01/10 by Daniel Öhlinger, Ulrich Schmid, Öhlinger, Daniel +1 · 1 citation
   Computer Science · #Physical Unclonable Functions (PUFs) and Hardware Security #VLSI and Analog Circuit Testing #Advanced Malware Detection Techniques
5. Counter Attack on Byzantine Generals: Parameterized Model Checking of Fault-tolerant Distributed Algorithms
   2012/10/14 by Annu John, Igor Konnov, John, Annu +7 · 2 citations
   Computer Science · #Distributed #Distributed systems and fault tolerance #FOS: Computer and information sciences #Formal Methods in Verification #Logic in Computer Science (cs.LO) #Parallel #Security and Verification in Computing #and Cluster Computing (cs.DC)
6. A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input Gate
   2021/11/16 by Ferdowsi, Arman, Maier, Jürgen, Öhlinger, Daniel +1 · 1 citation
   #B.5.2 #B.6.3 #B.8.2 #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Other Computer Science (cs.OH)
7. Faithful Dynamic Timing Analysis of Digital Circuits Using Continuous Thresholded Mode-Switched ODEs
   2024/03/05 by Arman Ferdowsi, Matthias Függer, Ferdowsi, Arman +7 · 1 citation
   Engineering · #Extremum Seeking Control Systems #FOS: Computer and information sciences #FOS: Electrical engineering #Hardware Architecture (cs.AR) #Photonic and Optical Devices #Semiconductor Lasers and Optical Devices #Systems and Control (eess.SY) #electronic engineering #information engineering