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On the Simulation of Time-Triggered Systems on a Chip with BIP

2011/09/26 by Jan Olaf Blech, Blech, Jan Olaf, Benoit Boyer +5 · 2 citations
Computer Science · Engineering · #Embedded Systems Design Techniques #FOS: Computer and information sciences #Real-Time Systems Scheduling #Real-time simulation and control systems #Software Engineering (cs.SE) #cs.SE

paper · pdf · doi:10.48550/arxiv.1109.5505

arxiv created 2011/09/26 · openalex publication_date 2011/09/26 · arxiv updated 2011/09/27 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

In this report, we present functional models for software and hardware components of Time-Triggered Systems on a Chip (TTSoC). These are modeled in the asynchronous component based language BIP. We demonstrate the usability of our components for simulation of software which is developed for the TTSoC. Our software comprises services and an application part. Our approach allows us to simulate and validate aspects of the software system at an early stage in the development process and without the need to have the TTSoC hardware at hand.

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