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A MAC-less Neural Inference Processor Supporting Compressed, Variable Precision Weights

2020/12/10 by Vincenzo Liguori, Liguori, Vincenzo
Computer Science · #Advanced Neural Network Applications #Adversarial Robustness in Machine Learning #B.0 #Computer Vision and Pattern Recognition (cs.CV) #FOS: Computer and information sciences #Human Pose and Action Recognition #Neural Networks and Applications #cs.CV

paper · pdf · doi:10.48550/arxiv.2012.06018

arxiv created 2020/12/10 · openalex publication_date 2020/12/10 · arxiv updated 2020/12/14 · openalex created_date 2022/07/25 · openalex updated_date 2026/07/28

Abstract

This paper introduces two architectures for the inference of convolutional neural networks (CNNs). Both architectures exploit weight sparsity and compression to reduce computational complexity and bandwidth. The first architecture uses multiply-accumulators (MACs) but avoids unnecessary multiplications by skipping zero weights. The second architecture exploits weight sparsity at the level of their bit representation by substituting resource-intensive MACs with much smaller Bit Layer Multiply Accumulators (BLMACs). The use of BLMACs also allows variable precision weights as variable size integers and even floating points. Some details of an implementation of the second architecture are given. Weight compression with arithmetic coding is also discussed as well as bandwidth implications. Finally, some implementation results for a pathfinder design and various technologies are presented.

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