Silicon Photonic 2.5D Interposer Networks for Overcoming Communication Bottlenecks in Scale-out Machine Learning Hardware Accelerators

2024/03/07 by Febin Sunny, Ebadollah Taheri, Sunny, Febin +5
Computer Science · Engineering · #Advanced Photonic Communication Systems #FOS: Computer and information sciences #FOS: Electrical engineering #Hardware Architecture (cs.AR) #Machine Learning (cs.LG) #Neural Networks and Reservoir Computing #Photonic and Optical Devices #Signal Processing (eess.SP) #electronic engineering #information engineering

paper · pdf · doi:10.48550/arxiv.2403.04189

openalex publication_date 2024/03/07 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

Modern machine learning (ML) applications are becoming increasingly complex and monolithic (single chip) accelerator architectures cannot keep up with their energy efficiency and throughput demands. Even though modern digital electronic accelerators are gradually adopting 2.5D architectures with multiple smaller chiplets to improve scalability, they face fundamental limitations due to a reliance on slow metallic interconnects. This paper outlines how optical communication and computation can be leveraged in 2.5D platforms to realize energy-efficient and high throughput 2.5D ML accelerator architectures.

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