A Characterization of the SPARC T3-4 System

2011/06/15 by M.W. van Tol, Michiel W. van Tol, van Tol, Michiel W. · 2 citations
Computer Science · #Advanced Data Storage Technologies #Interconnection Networks and Systems #Parallel Computing and Optimization Techniques #cs.DC #cs.OS #cs.PF

paper · pdf · doi:10.48550/arxiv.1106.2992

arxiv created 2011/06/15 · arxiv updated 2011/06/17

Abstract

This technical report covers a set of experiments on the 64-core SPARC T3-4 system, comparing it to two similar AMD and Intel systems. Key characteristics as maximum integer and floating point arithmetic throughput are measured as well as memory throughput, showing the scalability of the SPARC T3-4 system. The performance of POSIX threads primitives is characterized and compared in detail, such as thread creation and mutex synchronization. Scalability tests with a fine grained multithreaded runtime are performed, showing problems with atomic CAS operations on such physically highly parallel systems.

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• Advances in computer architecture
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