2011/03/16 by Lars Bergström, Bergstrom, Lars
Computer Science · #Advanced Data Storage Technologies #Distributed and Parallel Computing Systems #FOS: Computer and information sciences #Parallel Computing and Optimization Techniques #Performance (cs.PF)
paper · pdf · doi:10.48550/arxiv.1103.3225
openalex publication_date 2011/03/16 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Modern high-end machines feature multiple processor packages, each of which contains multiple independent cores and integrated memory controllers connected directly to dedicated physical RAM. These packages are connected via a shared bus, creating a system with a heterogeneous memory hierarchy. Since this shared bus has less bandwidth than the sum of the links to memory, aggregate memory bandwidth is higher when parallel threads all access memory local to their processor package than when they access memory attached to a remote package. But, the impact of this heterogeneous memory architecture is not easily understood from vendor benchmarks. Even where these measurements are available, they provide only best-case memory throughput. This work presents a series of modifications to the well-known STREAM benchmark to measure the effects of NUMA on both a 48-core AMD Opteron machine and a 32-core Intel Xeon machine.