1985/06/01 by James E. Smith, Andrew R. Pleszkun · 2 citations
Computer Science · Engineering · #Parallel Computing and Optimization Techniques #Embedded Systems Design Techniques #Low-power high-performance VLSI design #Citation #Computer science #Architecture #Library science #History #Archaeology
paper · doi:10.1145/327070.327125
openalex publication_date 1985/06/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/15
article Free Access Share on Implementation of precise interrupts in pipelined processors Authors: James E. Smith Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, WI Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, WIView Profile , Andrew R. Pleszkun Computer Sciences Department, University of Wisconsin-Madison, Madison, WI Computer Sciences Department, University of Wisconsin-Madison, Madison, WIView Profile Authors Info & Claims ACM SIGARCH Computer Architecture NewsVolume 13Issue 3June 1985 pp 36–44https://doi.org/10.1145/327070.327125Published:01 June 1985Publication History 158citation1,608DownloadsMetricsTotal Citations158Total Downloads1,608Last 12 Months185Last 6 weeks23 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF