2020/04/20 by Tao Li, Jie Hou, Jinli Yan +3 · 2 citations
Computer Science · Engineering · #VLSI and Analog Circuit Testing #Semiconductor materials and devices #3D IC and TSV technologies
paper · pdf · doi:10.3390/electronics9040670
openalex publication_date 2020/04/20 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/30
As a heterogeneous integration technology, the chiplet-based design technology integrates multiple heterogeneous dies of diverse functional circuit blocks into a single chip by using advanced packaging technology, which is a promising way to tackle the failure of Moore’s law and Dennard scaling. Currently, as process nodes move forward, dramatically rising cost, design cycle, and complexity are driving industry to focus on the chiplets. Chiplets allows IC designers to merge dies fabricated at different process nodes and reuse them in different projects, which helps to reduce the cost during design and improve yield. In this review, we look back at the industry’s efforts over the past decade and summary the concepts and techniques associated with chiplets. In the end, a discussion and conclusion will be given to forecast the future of chiplets.